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RISC-V CPU IP
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RISC-V CPU IP Solution
Nuclei Core Gen
FREQ(MHZ)
TECH
GEN_METHOD
Default
Area Optimized
Performance Optimized
Core Type
N200
Reg Number
32
16
PMP
PMP
PMP Entry Number :
8
16
TEE
TEE
Multiply/Divider
Not Supported
17-cycle Multiplier/33-cycle Divider
1-cycle Multiplier/33-cycle Divider
1-cycle Multiplier/17-cycle Divider
B-Extension
B-Extension
ILM
ILM
Interface :
SRAM
AHBL
ILM Addr Width :
DLM
DLM
Interface :
SRAM
AHBL
DLM Addr Width :
External Access ILM/DLM
External Access ILM/DLM
ICache
ICache
2K
4K
8K
16K
32K
64K
ICACHE Dedicated Bus
ICACHE Data Ram shared with ILM
Private Peripheral Bus
Private Peripheral Bus
Fast Peripheral Bus
Fast Peripheral Bus
Interrupt Number
Nice (Nuclei Instruction Custom Extension)
Nice (Nuclei Instruction Custom Extension)
查看大图