The cryptographic processor (CRYP) can be used both to encrypt and decrypt data using the DES, Triple-DES, AES or SM4 algorithms. It is a fully compliant implementation of the following standards:
• The data encryption standard (DES) and Triple-DES (TDES) as defined by Federal Information Processing Standards
Publication (FIPS PUB 46-3, Oct 1999), and the American National Standards Institute (ANSI X9.52).
• The advanced encryption standard (AES) as defined by Federal Information Processing Standards Publication (FIPS
PUB 197, Nov 2001).
• SM4 encryption standard GB/T 32907-2016.
Multiple key sizes and chaining modes are supported:
• DES/TDES chaining modes ECB and CBC, supporting standard 56-bit keys with 8-bit parity per key.
• SM4 chaining modes ECB, CBC, CTR, GCM, GMAC, CCM for key sizes of 128 bits.
• AES chaining modes ECB, CBC, CTR, GCM, GMAC, CCM for key sizes of 128, 192 or 256 bits.
The CRYP is a 32-bit bus peripheral. It supports DMA transfers for incoming and outgoing data (two DMA channels are required). The peripheral also includes input and output FIFOs (each 8 words deep) for better performance.
