The Mailbox IP is the communication channel between the internal system and the host processors. The host processors communicates with Mailbox through the AXI Slave interface, and Mailbox communicates with the internal system through the System Bus. All host cpus have access to externally visible 16K Byte address maps, including Mailbox Memory, Mailbox Status, and Mailbox CTRL registers. The access mailbox is controlled by the host ID and each MailBoxs status, and the access Interruput CTRL is completely managed by the host ID.
