uNPU
Core Features
The Neural-Network Accelerators (NACC) improves the inference performance of neural networks. The NACC data type is INT8, and supports im2col, convolution, depthwise convolution, average pool, max pool, fully connected, activation and matrix multiplication acceleration. Such as can accelerate ResNet, MobileNet, Alexnet, VGG16, YOLO and other structures of the network. This IP can be used as a accelerator for functions in NMSIS, the open-source TensorFlow Lite.
  • Support 8-bit fixed-point data formats.
  • Support bus transmission data width 128bit.
  • Support local single-port SRAM cache, and the bus can independently access the SRAM function.
  • Support accelerating of convolution, rgb convolution, depthwise convolution, pooling, fully connected, elementwise, activation function in NMSIS.
  • Support accelerating of matrix multiplication function in NMSIS.
  • Support accelerating of im2col function in NMSIS.
  • Support IFM split width or height,kernel split.
  • Support Multicore mode.
  • It has shared SRAM to store IFM ,Temp data and OFM.
Partners(排名不分先后)

RISC-V Foundation

SICA

China RISC-V Industry Alliance

China RISC-V Alliance

SZICC

HBSIA

CBSIA

SOPIC

武汉光电工业技术研究院

Amlogic

VeriSilicon

LAUTERBACH

TencentOS Tiny

OpenHarmony

PlatformIO

SEGGER

MUCSE

ORITEK

Brite

Innochip Technology

格见构知

AistarTek

exide

HighTec

CALTERAH

BinarySemi

X-EPIC

SILERGY

MachineWare

SIMANGO

TrustKernel

XIAOMI

JINGWEI HIRAIN

SIEMENS EDA

Motorcomm

CHIPWAYS

SWID

taolink-tech

GeoforceChip

ChipIntelli

Witmem

Fisilink

TIH Microelectronics

XinSheng Tech

GigaDevice

ASR

AnLogic

TusStar

Mocro & Nano Institute

RT-Thread

OPEN AI LAB

IAR

HUST

SJTU

WHU

HBUT

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