Nuclei CPU IP | N203 | N205 | N208 |
Dhrystone(DMIPS/MHz) | 1.84/4.70(Legal/Best Effort) | ||
CoreMark(CoreMarks/MHz) | 3.85 | ||
Pipeline Stages | 2 | ||
Issue-Width | Single-Issue | Single-Issue | Single-Issue |
User Mode & PMP(MPU) | Configurable | Configurable | Configurable |
Hardware Multiplier | Configurable | Configurable | Configurable |
Hardware Divider | Configurable | Configurable | Configurable |
Single-Precision/Double-Precision FPU | No | No | No |
Instruction-Cache | Configurable | Configurable | Configurable |
Data-Cache | No | No | No |
ILM | No | Configurable | Configurable |
DLM | No | Configurable | Configurable |
Digital Signal Processing (DSP) | No | No | No |
NICE | Configurable | Configurable | Configurable |
TEE | No | No | Configurable |
GD32VF103 series MCU is the first RISC-V universal chip have been brought to scale in the world.